Advanced Silicon Processing & Manufacturing Techniques

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MODULE PROFILE

Module Number: 6

Title: Measurement Techniques & Failure Analysis

Delivered by: University of Manchester

Module Credits: 15

Assessment Weighting:

  • Pre-residential work: 3
  • Post-residential work: 7
  • Examination: 10

Convenor:

  • Professor Tony Peaker, University of Manchester

Lecturers/Tutors:
Internal:

  • Professor Tony Peaker
  • Professor Bruce Hamilton
  • Dr Ian Hawkins
  • Dr Ursel Bangert
  • Dr Mathew Halsall
  • Professor Ken Singer

External:

  • Professor Anthony Walton, University of Edinburgh
  • Professor Steve Hall, University of Liverpool
  • Dr Octavian Buiu, University of Liverpool
  • Dr Jian Zhang, Liverpool John Moore's University

Industrial:

  • Dr Alan Brown, CSMA, Manchester

Industrial Advisors:

  • Dr A. Rasul Motorola - East Kilbride
  • Dr R. Grover - Philips Semiconductor,Hazel Grove
  • Professor C. Hill - Marconi - Caswell

Aims:

The aim of this module is to describe the measurement methods and associated equipment so that delegates will be able to both professionally interpret data and understand key QA issues. It will provide a valuable overview that is essential for those working in the semiconductor industry.

Learning Objectives:

On successful completion of this module delegates will have gained:

  • an understanding of the significance of data from imaging and analytical techniques, including their application to incoming materials.
  • an appreciation of the roles of in-line and off-line characterisation methods
  • an understanding of yield models and yield improvement strategies
  • an understanding of the design and use of test structures in process control and QA.
  • a familiarity with the basis and implications of device reliability statistics.
  • a knowledge of various failure mechanisms of importance in silicon microelectronics.

Assessment:

  • Pre-residential sessions: assignments 15 %
  • Post-residential sessions: assignments 35 %
  • Examination (supervised) 50 %

Background to the Module:

The course provides an introduction to the concepts, methodology and practice of characterisation for Quality Assurance (QA) in the semiconductor industry. It is appropriate for process, device, product and QA/reliability engineers, designers and managers. A guided selection of residential week reading and tasks will enable common ground to be established among the participants.

The course considers the role of both in-line and off-line characterisation techniques in relation to the specific needs for process control and also process debugging.

Pre-Requisite Knowledge:

Delegates will be expected to have a level of background knowledge equivalent to a good honours graduate in Physics, Materials, or Electronic Engineering and in addition to have attended Module 1 of this course or to have studied equivalent material.

Delivery & Assignments:

  • Pre-residential sessions:
    Pre-course reading and tasks will be specified according to the delegate's background. An assessment will be made of the delegate's educational/training level and work experience, including an outline of the delegates employment role and what other modules have been taken. As soon as possible after registering for the module all delegates will be sent the basic text "Semiconductor Materials and Device Characterization" by D K Schroder. Pre-module study will be specified on an individual basis … normally from this text but exceptionally study of more fundamental topics may be required from the module web site or by post.

    Delegates will be required to complete two written pre-course tasks (selected from five available work packages). The basis for task selection will be to establish a minimum level of familiarity with basic concepts. All pre-course task material will be available to all module delegates on restricted access World Wide Web pages and will contain self assessment tests.

  • Residential week (35 hours contact time):
    • Lectures/small discussion groups 30 hours
    • Laboratory sessions/ demonstrations/ computer simulation sessions/ 5 hours short exercises
  • Post-residential sessions:
    • Report based on a Laboratory or Demonstration Session
    • Review of 2000 to 4000 words, based on a small group session
    • Supervised examination (3 questions out of 5, 2 hours)

SYLLABUS

  • Lectures/Laboratory/Demonstration/Computer Simulation Sessions: 30 hours (plus short exercises)
  • Structured discussions/tutorials: 5 hours
Hours
Topic Content
1½.
What, why and how ? An overview of the need for characterisation techniques. These will differ according to process maturity (R&D, pilot etc), process type (DRAM, bipolar, power etc), feature size (evolving metrology), and specific requirements for the qualification of incoming materials the concept of a global approach
3
Physical Measurements and Imaging: Measurement tools and procedures, optical and infra-red microscopy, topology, surface defect size and distribution, metrology, electron imaging; basic SEM, FESEM, AFM/STM, TEM and STEM methods, dislocations and stacking faults, focussed ion beams for chip surgery
'Chemical' and Optical Methods of Impurity Detection: Total X-ray Florescence, EDX, ICP-MS, surface analysis and depth profiling; SIMS, Auger, LIMA and RBS; luminescence, local mode absorption for O, C, N and H (including self assessment test 1)
3
Basic Electrical & Electronic Characterisation: Carriers, impurities and defects, measurement concepts and techniques, oxides, gate and field dielectrics, ellipsometry, the MOS capacitor stress and breakdown, generation lifetime, 'contactless' techniques (including self assessment test 2)
Parameterised transistor models: Concepts, design and use of test structures; examples of test structures, design interface and process parameters (including self assessment test 3)
Techniques for powered IC's: Focussed ion beams, thermal imaging, light emission, advanced SEM techniques (voltage contrast, resistive contrast etc), charge and light- induced voltage alteration. Bitmap analysis
3
Failure Analysis, Yield and Reliability: Basic concepts in yield and yield models; yield improvement; reliability; introduction to statistics; failure statistics; defect statistics; yield/reliability relationships; life-testing; failure mechanisms (including self assessment test 4).
Future Needs … the Road-Map: Feature size, defects and impurities, in situ measurements, scanning probe microscopies, synchrotron X-ray metrology, software tools and electrical test diagnosis

Laboratory/Demonstration/Computer Simulation Sessions (plus short exercises)

Each delegate will complete three laboratory/demonstration sessions chosen from the following six possibilities. Self assessment exists within computer packages but a detailed report is required on one. Marks go towards overall assessment:

  • Microscopies (Optical, IR, SEM, AFM ,TEM) … live demos, video and computer learning package (two separate versions available to students)
  • Analytical techniques and test sample preparation (FIB/SIMS/Auger/DLTS/dielectric parameters) … demos & computer learning (two sessions)
  • Electrical measurements of sample test structures …hands on & computer package (two separate versions available to students one using the Edinburgh Teaching Chip: http://www.ee.ed.ac.uk/STR/emf/tchip.html)

Required Text (supplied free of charge to registered delegates during pre-course tasks)

  • "Semiconductor Materials and Device Characterization" by D K Schroder, published by Wiley, 1998 edition
  • "Semiconductor Characterization … Present Status and Future Needs" eds Bullis, Seiler and Diebold" American Inst: Phys: 1996, ISBN: 156-396-5038

Recommended Text for further reading on aspects of MOS characterisation

  • "Gate Dielectrics and MOS ULSI" by T. Hori published by Springer 1997

Conference & Journal Papers

The recommended reading in relation to review papers are collected in a compendium volume which will de given to delegates during the residential part of the course

TIMETABLE

NB: Details of content, timetable and lecturers may be subject to change

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Module 6

 

   
Monday
Tuesday
Wednesday
Thursday
Friday
08.30 - 10.00
Intiation/ safety/ tour of facilities/ computer cluster registrationWhat, why and how: an overview of techniques

MOS/MIS
Device
Characterisation

Concepts and use of test structures

Yield & reliability Statistcs

Free Time
10.00 - 10.30
COFFEE
COFFEE
COFFEE
COFFEE
COFFEE
10.30 - 12.00
Tunnelling
Microscopy
Techniques
MOS/MIS
Dielectric
Characterisation
Examples of test structures
Process Yield - a structured discussion
Examination Arrangements,
Module Feedback Questionnaires,
Post-residential Assignments
12.00 - 14.00
LUNCH
LUNCH
LUNCH
LUNCH
LUNCH
14.00 - 15.30
Optical Methods and Ion Beam Analysis
What Surface Analysis
can do for
Microelectronics
TEM/SEM
Laboratory
& Demonstration
Future Needs
The Road Map... A structured discussion
Administration/ Course tasks
Exmination Arrangements
15.30 - 16.00
TEA
ditto
ditto
TEA
TEA
Course Ends

16.00- 17.30

Transmission Electron Microscopy
ditto
ditto
Electrical Laboratory and Demonstration
 
17.30 - 19.00
Sel paced learning (Computer Clusters)

Scanning Electron Microscopies

Informal Discussions
Electrical Laboratory and Demonstration continued
18.30 - 20.00
DINNER
DINNER
COURSE BANQUET
DINNER
Informal discussions based on the days lecture topics
Informal discussions based on the days lecture topics
Informal discussions based on the days lecture topics
Enquiries and further information from:

Mrs Sandra Peace
IGDS Programme Co-ordinator,
IGDS Office
School of Electronics and Physical Sciences
University of Surrey
Guildford
Surrey
GU2 7XH UK

Tel +44 (0)1483 686 138
Fax +44 (0)1483 686 139
e-mail: s.peace@surrey.ac.uk
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