Module Number: 4
Title: Interconnect and Metallisation
Delivered by: University of Newcastle
Module Credits: 15
- Pre-residential Work: 3
- Post-residential Work 7
- Examination: 10
- Professor Nick Wright, University
of Newcastle upon Tyne
- Professor Nick Wright
- Professor Anthony O'Neill
- Professor David Kinniment
- Dr Alton Horsfall
- Dr Tom Stevenson, University of
- Professor John Wilson, Heriot-Watt
- Dr Lindsay Greer, University of Cambridge
- Dr Andrew Bavin, Trikon, Newport
- Dr Stuart Herbert, Applied Materials,
- Mr P Streck, Applied Materials, Royal
Quays, North Shields
The aim of this module is to provide
Delegates with the science and technology of metal and dielectric deposition,
for the realisation of interconnect and metal structures required for
advanced silicon IC's.
Upon successful completion of this module
Delegates will have gained:
a detailed understanding of the
fundamental mechanisms controlling the deposition of metal and dielectric
knowledge required for the engineering
and optimisation of industrial interconnect technologies.
knowledge of advanced metallisation,
damascene and planarization methods and their limitations
an appreciation of process control
methodologies and metrology techniques. · knowledge of interconnect
defects and failure mechanisms.
- an awareness of the sensitivity
of circuit performance upon processing parameters.
- Pre-residential sessions: assignments
- Post-residential sessions: assignments
- Examination: (supervised) 50%
Background to the Module:
The evolution of improved interconnect,
metallisation and dielectric technologies, has been critical to the
growth of the semiconductor industry over the last thirty years. The
growing relative influence of interconnect on circuit performance, has
produced severe pressure both to improve interconnect technology and
reduce costs. The rapid pace of developments (with significantly new
techniques entering the market place every year) makes it difficult
for practising engineers to develop an understanding of the fundamentals
of the new techniques and equipment enhancements. In addition, the subject
is strongly multidisciplinary drawing on expertise from a wide range
of fields (including physics, chemistry and engineering) and thus not
adequately covered in most conventional University courses in engineering
or the fundamental sciences.
Delegates will be expected to have a
level of knowledge equivalent to a good Honours degree in Physics, Materials
or Electronic Engineering and to have successfully completed Module
1 or to have studied equivalent material.
Delivery & Assignments:
- Pre-Course Reading
- An extensive study pack will
be sent to delegates which will include directed reading and problem
- Residential Week (35 hours contact
- Laboratory/Workshop sessions
- Tutorials/case studies/exercises
- Post-residential sessions:
- advanced tutorial questions
- written report (2000-4000 words)
- supervised examination (3 questions
out of 5, 2 hours)
- Lectures 21 hours
- Laboratory sessions/workshops 6
- Tutorials/case studies/exercises
|Multi-level metal interconnect
||SIA roadmap, basic metal
and interconnect structures, outline of manufacture, track-delay,
cross-talk. Current best practice and future trends.
deposition I & II:
||Spin-on techniques overview,
spin-on techniques (physics/chemistry), example process polyimide.
CVD overview, Example processes, TEOS. PECVD (plasma chemistry). Example
processes, oxide and nitride deposition. Multi-layer dielectric sandwiches.
Low-k dielectrics (properties and deposition). Fluorinated oxide,
|Workshop 1: Low-k dielectrics:
||Film properties. Thickness
(optical methods, stylus methods). Stoichiometry. Film stress (wafer
bow). Contamination (XRF). Dielectric etch. Desired etch profiles.
|Planarization and CMP
I & II:
||Global and local planarization,
need for CMP, basic physics/chemistry of CMP. Equipment. Industrial
perspective (visiting speaker)
|Metrology for CMP:
||Measurement of planarization.
Film stress and contamination. Post-CMP cleans (particle count)
|Physical Vapour Deposition
||Evaporation vs. Sputtering.
Physics of evaporation (heated boat and e-beam). Film properties.
Plasma physics of sputtering. Typical plasma reactors. Sputtered film
properties. Industrial PVD Equipment, (visting speaker Appled Materials)
||Desired via properties.
Typical via techniques. Al reflow vs tungsten plugs.
& Process Integration:
process integration, example of industrial process. Current best practice.
|Process Metrology for
||Plasma metrology (optical,
microwave techniques), in-situ film measurement
|Film Metrology for PVD:
of thin metal films: sheet resistance. Measuring capacitance on-wafer
properties of Al based films. Physical properties of metal films:
grain structure (including bamboo structure). Standard analysis of
|Cu and the damascene
||Need for Cu interconnect.
Damascene technique. Methods of Cu deposition (CVD, PVD and electrochemical).
of Cu electroplating. Modelling of interconnect: Process, basic details
of simulation methods. Principal software tools. Examples of simulation
for process optimisation.
|Workshop 2: Modelling
of interconnect, Electrical performance:
||Inter and Intra-layer
capacitance, cross-talk, track delay.
physical basis for electromigration (current wind) and stress migration.
Modelling of electromigration and stress-migration. Prediction of
film properties. Test structures and observed reliability/failure.
interconnect on circuit performance.
This module will include two laboratory
sessions relevant to interconnect and metallisation technology. These
will be performed in the University facilities supplemented by demonstrations
from leading suppliers of commercial equipment. In addition, delegates
will visit the nearby European Training Centre of Applied Materials.
Delegates will be provided with a study
pack containing lectures notes, details of laboratory sessions and relevant
Handbook of Semiconductor Interconnection
Technology, edited by G. Schwarz, K. Srikrishnan and A. Bross, Marcel
Dekker Inc. ISBN 0-8247-9966-6 (1998). This
is the main book used for this module
Process Engineering Analysis in
Semiconductor Fabrication, S Middleman and A K Hochberg, McGraw-Hill
International. ISBN 0-07-112744-5 (1993)
Conference & Journal Papers:
Plasma-assisted chemical vapor deposition
of dielectric thin films for ULSI semiconductor circuits by D. R.
Cote, S. V. Nguyen, A. K. Stamper, D. S. Armbrust, D. Tobben, R.
A. Conti, and G. Y. Lee, IBM Journal of Research , Vol. 43, No.
1/2, 1999, pp. 5-20
Future Interconnect technologies
and copper metallization by X. W. Lin and D. Pramanik, Solid-State
Technology Vol 41, No 10, 1999, pp. 63-74.
Ultralarge scale integrated metallization
and interconnects by C. Whitman, M. M. Moslehi, A. Paranjpe, L.
Velo, T. Omstead, Journal of Vacuum Science & Technology A - vacuum
surfaces and films 1999, Vol.17, No.4 Pt2, pp.1893-1897
NB: Details of content, timetable and
lecturers maybe subject to change